Image:CMOS NAND Layout.svg
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CMOS_NAND_Layout.svg (294 × 587 pixel, file size: 12 KB, MIME type: image/svg+xml)
A and B are the two inputs into the NAND gate.
[edit] Summary
| Description |
SVG drawing of a CMOS NAND gate. |
|---|---|
| Source |
Own work |
| Date |
2006-09-07 |
| Author |
User:Jamesm76 |
| Permission |
I release this to the public domain. |
[edit] Licensing
I, the creator of this work, hereby release it into the public domain. This applies worldwide.
In case this is not legally possible,
I grant any entity the right to use this work for any purpose, without any conditions, unless such conditions are required by law.
File history
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- (del) (cur) 23:46, 7 September 2006 . . Jamesm76 (Talk | contribs) . . 294×587 (11,839 bytes) (I am the author and I release this to the public domain.)
- (del) (rev) 23:27, 7 September 2006 . . Jamesm76 (Talk | contribs) . . 294×587 (11,827 bytes) (SVG drawing of a CMOS NAND gate replacing the older PNG version I had previously uploaded ("CMOS NAND Layout.png"). I am the author and I release this to the public domain.)
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