Meiko CS-2

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The Meiko CS-2 was a massively parallel supercomputer produced by Meiko Scientific. The CS-2 was launched in 1993 and was Meiko's second-generation system architecture, superseding the earlier Computing Surface.

The CS-2 was an all-new modular architecture based around SuperSPARC or hyperSPARC processors and, optionally, Fujitsu μVP vector processors. These implemented an instruction set similar to the Fujitsu VP2000 vector supercomputer and had a nominal performance of 200 megaflops on double precision arithmetic and double that on single precision. The SuperSPARC processors ran at 40 MHz initially, later increased to 50 MHz. Subsequently, hyperSPARC processors were introduced at 66, 90 or 100 MHz. The CS-2 was intended to scale up to 1024 processors. The largest CS-2 system built was a 224-processor system installed at Lawrence Livermore National Laboratory[1].

The CS-2 ran a customized version of the Solaris operating system, initially Solaris 2.1, later 2.3 and 2.5.1.

The processors in a CS-2 were connected by a multi-stage packet-switched "fat tree" network implemented in custom silicon. This comprised two devices, code-named Elan and Elite. Each processing element included an Elan chip, a communications co-processor based on the SPARC architecture, accessed via a Sun MBus interface and providing two 50MB/s bi-directional links. The Elite chip was an 8-way link crossbar switch, used to form the packet-switched network. After Meiko technology was acquired by Quadrics, the Elan/Elite interconnect technology was developed into QsNet.

[edit] References

• Top500 description of the CS-2
• E. McIntosh and B. Panzer-Steindel. Parallel Processing at CERN. Presented at HEPiX96 Caspur Rome, October 1996.
• CS-2: Predatory Computing Performance, Meiko, 1992.
• CS-2 Product Description, Meiko, 1993.