Motorola 68020
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The Motorola 68020 is a 32 bit microprocessor from Motorola, released in 1984. It is the successor to the Motorola 68010 and is succeeded by the Motorola 68030.
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[edit] Description
The 68020 (usually just referred to as the '020, pronounced oh-two-oh or oh-twenty) had 32-bit internal and external data and address buses. A lower cost version, the 68EC020, only had a 24-bit address bus.
[edit] Improvements over 68010
The 68020 added many improvements to the 68010 including a 32-bit arithmetic logic unit (ALU), external data bus and address bus, and new instructions and addressing modes. The 68020 (and 68030) had a proper three-stage pipeline.
The alignment restriction on word and longword data access present in its predecessors was removed with the 68020.
[edit] Multiprocessing features
The Motorola multiprocessing model was added with the 68020. This allowed up to eight processors per system to co-operate, these eight could be any number of CPUs, FPUs but a single MMU (either a Motorola 68841 or 68851). This had some limitation, as each CPU used had to be the same model (not necessarily the same clock) and each FPU has to be the same model (again, not necessarily the same clock) so multiprocessing a 68020/25 with a 68030/25 was not allowed (the 020, for example, could not be aware of the 030's internal MMU) but a 68020/25 with a 68882/33 was perfectly acceptable and quite common. It was, however, extremely uncommon to see more than one CPU or FPU in the same system. Most Unix boxes made with 68020s were simply the '020, an FPU (68881 or 68882) and an MMU (68841 or 68851).
[edit] Instruction set
The new instructions included some minor improvements and extensions to the supervisor state, several instructions for software management of a multiprocessing system (which were removed in the 68060), some support for high-level languages which did not get used much (and was removed from future 680x0 processors), bigger multiply (32×32→64 bits) and divide (64÷32→32 bits quotient and 32 bits remainder) instructions, and bit field manipulations.
[edit] Addressing modes
The new addressing modes added scaled indexing and another level of indirection to many of the pre-existing modes, and added quite a bit of flexibility to various indexing modes and operations. Though it was not intended, these new modes made the 68020 very suitable for page printing; most laser printers in the early '90s had a 68EC020 at their core.
The 68020 had a minimal 256 byte direct-mapped instruction cache, arranged as 64 four-byte entries. Although small, it still made a significant difference in the performance of many applications. The resulting decrease in bus traffic was particularly important in systems relying heavily on DMA.
[edit] Usage
The 68020 was used in the Apple Macintosh II and Macintosh LC personal computers, as well as Sun 3 workstations. It is also the processor used on board TGV trains to decode signalling information which is sent to the trains through the rails. The Commodore Amiga 1200 computer and the Amiga CD32 games console used the cost-reduced 68EC020.
For more information on the instructions and architecture see Motorola 68000.
[edit] References
This article was originally based on material from the Free On-line Dictionary of Computing, which is licensed under the GFDL.
[edit] External links
| List of Motorola/Freescale microprocessors | |
|---|---|
| The 6800 family : | 6809 (see also: Hitachi 6309) |
| 68000 family : | 68000 | 68008 | 68010 | 68012 | 68020 | 68030 | 68040 | 68060 | ColdFire | DragonBall |
| Low-cost variants: | 68EC000 | 68EC020 | 68EC030 | 68EC040 | 68LC040 |
| Pre-PowerPC RISC : | 88000 |
| Floating-point coprocessors : | 68881, 68882 |
| PowerPC family : | PPC 75x ("PowerPC G3") | PPC 74xx ("PowerPC G4") | PowerQUICC |
