Overflow flag
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In computer processors, the overflow flag (sometimes called V flag) is usually a single bit in a system status register used to indicate when an arithmetic overflow has occurred in an operation.
An example of the use of the overflow flag is what happens if you were to add 127 and 127 using 8-bit signed integers. The mathematical answer is 254, but in binary this is 1111 1110 in Two's complement which is negative (-2). The overflow flag is set to indicate a problem, so the software can be aware of the problem and act accordingly to compensate or mitigate the error. The overflow flag is usually computed as the xor of the carry into the sign bit and the carry out of the sign bit.
The overflow flag is changed in the x86 processor family by the following instructions (referring to 80386 Intel manual):
- All arithmetic operations;
- A compare instruction (equivalent to a subtract instruction without storing the result).
The overflow flag is cleared in the x86 processor family by the following instructions:
- Logical operations - XOR, AND, OR;
- TEST instruction (equivalent to the AND instruction without storing the result).
The overflow flag is set to undefined or unusual values after several other instructions. For example, after a MUL instruction, the overflow flag is set if and only if the high order half of the result is nonzero.
The overflow could be considered to be the signed equivalent of the carry flag. An operation resulting in the overflow flag being set does not automatically generate an exception.
