PCI-X
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| PCI-X Peripheral Component Interconnect Extended |
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 A PCI-X Gigabit Ethernet expansion card. |
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| Year Created: | 1998 |
| Created By: | IBM, HP, and Compaq |
| Superseded By: | PCI Express (2004) |
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| Width: | 64 bits |
| Number of Devices: | 1 per slot |
| Speed: | 1014 MB/s |
| Style: | Parallel |
| Hotplugging? | no |
| External? | no |
PCI-X (Peripheral Component Interconnect Extended) is a computer bus and expansion card standard designed to supersede PCI. It is essentially a faster version of PCI, running at twice the speed, and is otherwise similar in physical implementation and basic design. It has itself been replaced in modern designs by the similar-sounding PCI Express, which features a very different logical design.
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[edit] Background
PCI-X was developed jointly by IBM, HP, and Compaq. PCI-X is a revision to the PCI standard that doubles the clock speed (from 66 MHz to 133 MHz) and hence the amount of data exchanged between the computer processor and peripherals. Standard PCI supports up to 64-bit at 66 MHz (though anything above 32-bit at 33 MHz is only seen in high end systems) and additional bus standards move 32 bits at 66 MHz or 64 bits at 33 MHz. The theoretical maximum amount of data exchanged between the processor and peripherals with PCI-X is 1.06 GB/s, compared to 532 MB/s with standard PCI. PCI-X is generally backward compatible with PCI, meaning that you can, for example, install a PCI card that is keyed to allow 3.3V operation in a PCI-X slot. A PCI-X card can be installed in a PCI slot provided it has the correct voltage keying for the slot and (if inserting in a 32 bit slot) nothing obstructs the overhanging part of the edge connector. PCI and PCI-X cards can be intermixed on a PCI-X bus, but the speed will be limited to the speed of the slowest card (for this reason and the voltage compatibility issue most systems with PCI-X will have a normal PCI bus as well) . PCI-X improves the fault tolerance of PCI allowing, for example, faulty cards to be reinitialized or taken offline.
IBM, HP, and Compaq designed PCI-X for servers to increase performance for high bandwidth devices such as Gigabit Ethernet, Fibre Channel and Ultra3 SCSI cards, and to allow processors to be interconnected in clusters. Compaq, IBM, and HP submitted PCI-X to the PCI Special Interest Group (Special Interest Group of the Association for Computing Machinery) in 1998. PCI SIG approved PCI-X, and it is now an open standard that can be adapted and used by all computer developers. PCI SIG controls technical support, training and compliance testing for PCI-X. IBM, Intel, Microelectronics and Mylex plan to develop chipsets to support PCI-X. 3Com and Adaptec intended to develop PCI-X peripherals.
PCI-X was developed in an attempt to codify individual extensions to the standard PCI bus. PCI-X was needed as some devices, most notably Gigabit Ethernet cards, Fibre Channel and Ultra320 SCSI controllers, as well as cluster interconnects could saturate the full bandwidth (only 133 MB/s) of the PCI bus themselves. The first solution was to run the 33 MHz PCI bus at double the speed, 66 MHz, effectively doubling the throughput to 266 MB/s. However, machines with multiple high bandwidth devices still needed more headroom, so additional pins were added to the slot, going from 120 to 184, to form a 64-bit variety. This initially only ran at 33 MHz basically giving the same maximum throughput of 266 MB/s. Combined 64-bit 66 MHz ports also showed up. However, these extensions were only loosely supported as optional parts of the PCI 2.x standards. Device compatibility beyond the basic 133 MB/s was still difficult.
In 1998 Compaq, IBM, and HP combined the 64-bit extension with the 66 MHz extension, and predicting future demand developed 100 MHz and 133 MHz variants to raise the possible bandwidth to 798 MB/s and 1064 MB/s respectively. They submitted the joint result to the PCI Special Interest Group (PCI SIG) as PCI-X. PCI SIG approved PCI-X, and it is now an open standard that can be adapted and used by all computer developers. PCI SIG controls technical support, training and compliance testing for PCI-X. All major chip makers generally now have some variant of PCI-X in their product lines.
PCI-X is backward compatible with most cards based on the PCI 2.x or later standard. Originally the PCI bus was a 5 volt bus. Later, in PCI Revision 2.x the PCI bus was a dual voltage interconnect. In 3.0 this was changed to 3.3 volt only. The PCI-X bus is not compatible with 5 volt cards. Most newer PCI cards will work in a PCI-X slot; however, they will limit the speed of the entire bus. For example a PCI 2.3 device running at 32-bit and 66 MHz in a PCI-X 133 bus will limit the total throughput of the bus to 266 MB/s. To get around this limitation, many motherboards have separate PCI-X channels, allowing for better backward compatibility, and higher total bandwidth. PCI-X is also designed to be more fault tolerant than PCI. For example, PCI-X has provisions to reinitialize or deactivate a faulty card before a total system failure occurs.
To accelerate PCI-X adoption by the industry, Compaq offers PCI-X development tools at their Web site.
[edit] PCI-X 2.0
In 2003 PCI SIG ratified PCI-X 2.0 which adds 266 MHz and 533 MHz variants. These variants give roughly 2.15 GB/s and 4.3 GB/s throughput, respectively. PCI-X 2.0 makes additional protocol revisions that are designed to help system reliability and add error correction ECC to the bus to avoid resends. To deal with one of the most common complaints of the PCI-X form factor, the 184 pin connector, 16-bit ports were developed to allow PCI-X to be used in devices with tight space constraints. Similar to PCI-Express, PtP functions were added to allow for devices on the bus to talk to each other without burdening the CPU or bus controller.
Despite the various theoretical advantages of PCI-X 2.0 and its backward compatibility with PCI-X and PCI devices, it has not been implemented on a large scale (as of 2006). This lack of implementation is primarily because hardware vendors have chosen to integrate PCI-Express instead.
[edit] Confusion with PCI-Express
PCI-X is often confused with PCI-Express, commonly abbreviated as PCI-E or PCIe. While they are both high-speed computer buses for internal peripherals, they differ in many ways. The first is that PCI-X is a parallel interface that is directly backward compatible with all but the oldest (5 volt) PCI devices. PCIe is a serial bus that offers no compatibility with older buses. In the future PCI-X and PCI buses may run off a PCIe bridge, similar to the way ISA buses ran off PCI buses in some computers. This should not be confused with compatibility. PCIe also matches PCI-X and even PCI-X 2.0 in maximum bandwidth. PCIe x1 offers 250 MB/s in both directions, and currently supports up to an x16 standard at 4 GB/s.
PCI-X has a number of technological and economical disadvantages over PCI-Express. The 64-bit parallel interface requires inherently difficult trace routing, because as with all parallel interfaces, the signals from the bus must arrive simultaneously or within a very short window, and noise from adjacent slots may cause interference. The serial interface of PCIe suffers fewer such problems and therefore requires less complex and less expensive designs. PCI-X buses, like PCI, are half-duplex bidirectional whereas PCIe buses are full-duplex bidirectional. PCI-X buses run only as fast as the slowest device; PCIe devices are able to independently negotiate the bus speed.
[edit] External links
This article is part of a series on computer expansion buses.
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| Preceding: | PCI |
| Subsequent: | PCI Express |
