XPU Dual Processor Unit
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[edit] Introduction
The Cromemco XPU extended dual processor unit incorporates two microprocessors on a single board. The MC68000/68010 provides the power and speed of a new generation of 32-bit microprocessor chips, while the Z80 guarantees compatibility with most existing hardware and software. One of the two microprocessors controls the bus at any given time, yielding control to the other as required by the software.
The Motorola MC68000/68010 microprocessor has 18 32-bit internal registers, a 16-bit external data bus, and a 24-bit external address bus. It can directly address 16 megabytes of memory and has 56 instruction types, 5 data types, and 14 address modes yielding an instruction set of over 1000 instructions. These features make the MC68000/68010 extremely fast and versatile. Unlike the MC68000, the MC68010 permits program execution to be suspended by a bus error and later restarted.
This permits the development of Virtual Memory software when used in conjunction with the Cromemco XMM board.
[edit] Memory Support
The XPU supports both vertical and horizontal memory configurations.
Horizontal memory, arranged in banks, is used by CDOS and the Z80 Cromix Operating System. This memory configuration allows the operating system, contained in one 64K-byte bank, to select one of up to six banks of 64K bytes each. This provides a total of 448K bytes of addressable memory. Horizontal memory requires the use of Cromemco 64KZ, 64KZ-II, or 256KZ memory boards and does not support the 68000 Cromix Operating System.
Vertical memory is used by l:he 68000 Cromix Operating System. This configuration allows the operating system to directly address up to 16 megabytes of memory without using bank selection. Vertical memory requires Cromemco 256KZ board( s), or an MCU with MSU-series boards. CDOS is not supported by vertical memory configurations. All Cromemco I/O boards are compatible with an XPU configured with vertical memory, except the SDI/48KTP and the WDI-II.
Mapped memory requires the installation of the companion XMM board. The XPU provides address lines A23-A12 and some control signals on a 34-pin connector, J1. When connected to the Cromemco XMM (eXtended Memory Management board), addresses generated by the MC68000/68010 and Z80 programs may be relocated on 4K-byte boundaries. Memory protection implemented
[edit] Selecting the Z80 or the 68000
The XPU board automatically starts up in the Z80 mode of operation. When a 1 is output to port FFh, control switches to the MC68000/68010.
When the MC68000/68010 is first used, after power-up or system reset, it obtains its stack pointer (sp) from location 0 and its program counter (pc) from location 4. Subsequently, when control switches from the Z80 to the MC68000/68010, the program continues execution as though it had not been interrupted.
The following Z80 instructions initiate MC68000/68010 operation with the stack at 6000h and a starting address of 7000h. On subsequent calls to the MC68000/68010, only the two instructions with the comment switch control to the MC68000/68010 are needed because the stack pointer and program counter have already been established.
ld hl,intdat ; initialise sp and pcounter
ld de,0
ld bc,8
ldir
ld a,1 ; switch control to 68000
out 0ffh,a
intdat: db 0,0,60h,0 ; location of stack
db 0,0,70h,0 ; starting address
To switch from the MC68000/68010 to the Z80, output a 0 to port FFh. This may be done by writing to the top 64K of memory as follows.
move.b #0,0FFFFFFH
The 24-bit address to which the zero is moved may be thought of as consisting of three segments. The first ff indicates the top 64K of memory (the area reserved for memory mapped I/O). The second ff is mandatory. The last ff is the port address.
