OpenRISC
From Wikipedia, the free encyclopedia
OpenRISC is an open source hardware RISC CPU design by OpenCores released under the GNU Lesser General Public License. The design is implemented in the verilog hardware description language and has been manufactured successfully as an ASIC as well as being hosted in FPGA environments.
The GNU toolchain has been ported to OpenRISC to support development in several languages and Linux and uClinux have been ported to the processor.
[edit] See also
[edit] External links
- OpenRISC 1200 at the Open Cores Website
- GNU toolchain building guides
- Beyond Semiconductor commercial fabless semiconductor company founded by the developers of OpenRISC
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