多核心

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多核心，也叫多微处理器核心是将两个或更多的独立处理器封装在一起的方案，通常在一个集成电路（IC）中。双核心设备只有两个独立的微处理器。一般说来，多核心微处理器允许一个计算设备在不需要将多核心包括在独立物理封装时执行某些形式的线程级并行处理（Thread-Level Parallelism，TLP）这种形式的TLP通常被认为是芯片级别的多处理（Chip-level MultiProcessing，CMP）。在游戏中你必须要使用驱动程序来利用第二颗核心。

"多核心"、"双核心"的定义在字面使用中有一定差距。他们通常指某些种类的中央处理器（Central Processing Unit，CPU），但是某些时候也应用到DSP和SoC中。另外，某些情况中只适用于在同一个集成电路中的多核心微处理器。这些人将同一封装中集成的独立微处理器芯片称做“多处理模块”，“双核心”等。除非特别说明，本文将使用“多核心”指代在同一集成电路中集成的CPU。

目录 1 商业化的例子 2 开发动机 2.1 技术压力 2.2 商业诱因 2.3 优势 2.4 劣势 3 软件影响 3.1 许可 4 普遍误解 5 备注 6 参见 7 外部链接

[编辑] 商业化的例子

• 国际商用机器公司的POWER4，2000年发布的第一个双核心模块处理器。
• IBM的POWER5双核心芯片，还有应用在苹果电脑PowerMac G5中的PowerPC 970MP双核心处理器。
• Broadcom SiByte (SB1250, SB1255, SB1455)
• PA-RISC (PA-8800)
• Sun Microsystems UltraSPARC IV, UltraSPARC IV+, UltraSPARC T1
• AMD在2005年4月22日发布了它的双核心Opteron服务器/工作站用处理器，还有2005年5月31日发布的双核心桌面处理器Athlon 64 X2家族，AMD还发布了FX-60和FX-62高性能桌面处理器，以及Turion 64 X2移动处理器。
• Intel的双核心Xeon处理器，开发代号为Paxville和Dempsey，初识频率为3 GHz。该公司当前还在开发双核心版本的Itanium高端服务器CPU架构并生产了Pentium D，Pentium 4的移动版。一个更新的处理器芯片Core Duo，应用在苹果电脑的iMac、高端的Mac mini、MacBook以及MacBook Pro中，以及其他多种如索尼、东芝、华硕等厂家的笔记本电脑中。下一代版本Core 2 Duo，开发代号Conroe，在2006年7月发布。
• Motorola/Freescale在PowerPC e600和e700的基础上开发双核心芯片。
• Microsoft的Xbox 360 游戏终端使用了三核心的PowerPC微处理器。
• Raza Microelectronics的 XLR 处理器拥有8个MIPS核心。
• Cavium Networks的Octeon处理器拥有16个MIPS核心。

[编辑] 开发动机

[编辑] 技术压力

While CMOS manufacturing technology continues to improve, reducing the size of single gates, physical limits of semiconductor-based microelectronics become a major design concern. Some effects of these physical limitations can cause significant heat dissipation and data synchronization problems. The demand for more complex and capable microprocessors causes CPU designers to utilize various methods of increasing performance. Some ILP methods like superscalar pipelining are suitable for many applications, but are inefficient for others that tend to contain difficult-to-predict code. Many applications are better suited to TLP methods, and multiple independent CPUs is one common method used to increase a system's overall TLP. A combination of increased available space due to refined manufacturing processes and the demand for increased TLP led to the logical creation of multi-core CPUs.

[编辑] 商业诱因

Several business motives drive the development of dual-core architectures. Since SMP designs have been long implemented using discrete CPUs, the issues regarding implementing the architecture and supporting it in software are well known. Additionally, utilizing a proven processing core design (e.g. Freescale's e700 core) without architectural changes reduces design risk significantly. Finally, the connotations of the terminology "dual-core" (and other multiples) lends itself to marketing efforts.

Additionally, for general-purpose processors, much of the motivation for multi-core processors comes from the increasing difficulty of improving processor performance by increasing the operating frequency (frequency-scaling). In order to continue delivering regular performance improvements for general-purpose processors, manufacturers such as Intel and AMD have turned to multi-core designs, sacrificing lower manufacturing costs for higher performance in some applications and systems.

Multi-core architectures are being developed, but so are the alternatives. An especially strong contender for established markets is to integrate more peripheral functions into the chip.

[编辑] 优势

• Proximity of multiple CPU cores on the same die have the advantage that the cache coherency circuitry can operate at a much higher clock rate than is possible if the signals have to travel off-chip, so combining equivalent CPUs on a single die significantly improves the performance of cache snoop operations.
• Assuming that the die can fit into the package, physically, the multi-core CPU designs require much less Printed Circuit Board (PCB) space than multi-chip SMP designs.
• A dual-core processor uses slightly less power than two coupled single-core processors, principally because of the increased power required to drive signals external to the chip and because the smaller silicon process geometry allows the cores to operate at lower voltages; furthermore, the cores share some circuitry, like the L2 cache and the interface to the front side bus (FSB).
• In terms of competing technologies for the available silicon die area, multi-core design can make use of proven CPU core library designs and produce a product with lower risk of design error than devising a new wider core design. Also, adding more cache suffers from diminishing returns.

[编辑] 劣势

• Multi-core processors do not need the operating system (OS) to support them, but instead adjustments to existing software are required to maximize the computing resources provided by multi-core processors. Also, the ability of multi-core processors to increase application performance depends on using threaded applications to optimize the use of resources.
• Integration of a multi-core chip drives production yields down and they are more difficult to manage thermally than lower-density single-chip designs.
• From an architectural point of view, ultimately, single CPU designs may make better use of the silicon surface area than multiprocessing cores, so a development commitment to this architecture may carry the risk of obsolescence.

[编辑] 软件影响

Most existing software is not ready to directly utilize the power of multicore processors since they are written in traditional sequential programming languages like C, C++ and FORTRAN, all of which have the limited scope of only one processor in mind.^{[來源請求]}

Current software titles that fully utilize multi-core technologies include: Maya, Blender3D, Quake 3 & 4, Elder Scrolls: Oblivion, 3DS Max, Adobe Photoshop, Windows XP Professional, Windows 2003, Mac OS X, Linux, and many operating systems that are streamlined for server use.

Parallel programming is a must option for a single software to exploit multiple computation units(cores) simultaneously, often by multithread or multitask programming. Some existing parallel programming models such as OpenMP and MPI can be directly used on multi-core platforms. Other research efforts have been seen also, like Cray’s Chapel, Sun’s Fortress, and IBM’s X10.

Concurrency acquires a central role in true parallel application. The basic steps in designing parallel applications are:

Partitioning 

The partitioning stage of a design is intended to expose opportunities for parallel execution. Hence, the focus is on defining a large number of small tasks in order to yield what is termed a fine-grained decomposition of a problem.

Communication 

The tasks generated by a partition are intended to execute concurrently but cannot, in general, execute independently. The computation to be performed in one task will typically require data associated with another task. Data must then be transferred between tasks so as to allow computation to proceed. This information flow is specified in the communication phase of a design.

Agglomeration 

In the third stage, we move from the abstract toward the concrete. We revisit decisions made in the partitioning and communication phases with a view to obtaining an algorithm that will execute efficiently on some class of parallel computer. In particular, we consider whether it is useful to combine, or agglomerate, tasks identified by the partitioning phase, so as to provide a smaller number of tasks, each of greater size. We also determine whether it is worthwhile to replicate data and/or computation.

Mapping 

In the fourth and final stage of the parallel algorithm design process, we specify where each task is to execute. This mapping problem does not arise on uniprocessors or on shared-memory computers that provide automatic task scheduling.

On the other hand, on the server side, multicore processors are ideal because they allow many users to connect to a site simultaneously and have independent threads of execution. This allows for Web servers and application servers that have much better throughput.

[编辑] 许可

Another issue is the question of software licensing for multi-core CPUs. Typically enterprise server software is licensed "per processor". In the past a CPU was a processor (and moreover most computers had only one CPU) and there was no ambiguity. Now there is the possibility of counting cores as processors and charging a customer for two licenses when they use a dual-core CPU. However, the trend seems to be counting dual-core chips as a single processor as Microsoft, Intel, and AMD support this view. Oracle counts AMD and Intel dual-core CPUs as a single processor but has other numbers for other types. IBM, HP and Microsoft count a multi-chip module as multiple processors. If multi-chip modules counted as one processor then CPU makers would have an incentive to make large expensive multi-chip modules so their customers saved on software licensing. So it seems that the industry is slowly heading towards counting each die (see Integrated circuit) as a processor, no matter how many cores each die has. Intel has released Paxville which is really a multi-chip module but Intel is calling it a dual-core. It is not clear yet how licensing will work for Paxville. This is an unresolved and thorny issue for software companies and customers.

[编辑] 普遍误解

Many people commonly assume that the multithreading benefits of a dual-core processor will translate into a better user experience while multitasking. This is not generally true, as many user applications (such as word processing applications) spend most of their time in an idle state; a person can't switch contexts faster than a computer. The improvements in computer responsiveness are generally a function of the operating system and the application code; many applications are not pervasively multithreaded since coding multithreaded applications is generally considered to be very difficult.

[编辑] 备注

1. ^  Digital signal processors, DSPs, have utilized dual-core architectures for much longer than high-end general purpose processors. A typical example of a DSP-specific implementation would be a combination of a RISC CPU and a DSP MPU. This allows for the design of products that require a general purpose processor for user interfaces and a DSP for real-time data processing; this type of design is suited to e.g. mobile phones.
2. ^  Two types of operating systems are able to utilize a dual-CPU multiprocessor: partitioned multiprocessing and symmetric multiprocessing (SMP). In a partitioned architecture, each CPU boots into separate segments of physical memory and operate independently; in an SMP OS, processors work in a shared space, executing threads within the OS independently.

[编辑] 参见

• 超线程
• 多处理
• 对称多处理 (SMP)
• 芯片级多处理 (CMP)
• simultaneous multithreading (SMT)
• 多任务
• 并行计算

[编辑] 外部链接

• AMD HyperTransport Technology
• Hyper-Threading Technology Intel
• Intel First to Ship Dual Core – By Michael Singer, internetnews.com, 12 April 2005
• Findings of a test carried out by Anandtech showed that dual-core chips produced by AMD and Intel had individual performance merits under different situations of application