Static Wikipedia February 2008 (no images)

aa - ab - af - ak - als - am - an - ang - ar - arc - as - ast - av - ay - az - ba - bar - bat_smg - bcl - be - be_x_old - bg - bh - bi - bm - bn - bo - bpy - br - bs - bug - bxr - ca - cbk_zam - cdo - ce - ceb - ch - cho - chr - chy - co - cr - crh - cs - csb - cu - cv - cy - da - de - diq - dsb - dv - dz - ee - el - eml - en - eo - es - et - eu - ext - fa - ff - fi - fiu_vro - fj - fo - fr - frp - fur - fy - ga - gan - gd - gl - glk - gn - got - gu - gv - ha - hak - haw - he - hi - hif - ho - hr - hsb - ht - hu - hy - hz - ia - id - ie - ig - ii - ik - ilo - io - is - it - iu - ja - jbo - jv - ka - kaa - kab - kg - ki - kj - kk - kl - km - kn - ko - kr - ks - ksh - ku - kv - kw - ky - la - lad - lb - lbe - lg - li - lij - lmo - ln - lo - lt - lv - map_bms - mdf - mg - mh - mi - mk - ml - mn - mo - mr - mt - mus - my - myv - mzn - na - nah - nap - nds - nds_nl - ne - new - ng - nl - nn - no - nov - nrm - nv - ny - oc - om - or - os - pa - pag - pam - pap - pdc - pi - pih - pl - pms - ps - pt - qu - quality - rm - rmy - rn - ro - roa_rup - roa_tara - ru - rw - sa - sah - sc - scn - sco - sd - se - sg - sh - si - simple - sk - sl - sm - sn - so - sr - srn - ss - st - stq - su - sv - sw - szl - ta - te - tet - tg - th - ti - tk - tl - tlh - tn - to - tpi - tr - ts - tt - tum - tw - ty - udm - ug - uk - ur - uz - ve - vec - vi - vls - vo - wa - war - wo - wuu - xal - xh - yi - yo - za - zea - zh - zh_classical - zh_min_nan - zh_yue - zu

Web Analytics
Cookie Policy Terms and Conditions Sempron - Wikipedia, the free encyclopedia

Sempron

From Wikipedia, the free encyclopedia

Sempron
Central processing unit
Produced: July 2004
Manufacturer: AMD
CPU Speeds: 1.4 GHz to 2.2 GHz
FSB Speeds: 166 MHz to 200 MHz
Instruction Set: x86, AMD64
Sockets:
Cores:
  • Thoroughbred B/Thorton
  • Barton
  • Paris
  • Palermo (Socket 754, 939)
  • Manila (Socket AM2)
AMD Sempron Logo
AMD Sempron Logo
Socket-A Sempron 3000+
Socket-A Sempron 3000+

Sempron has been the marketing name used by AMD for several different entry level desktop CPUs, using several different technologies and CPU socket formats.

The Sempron replaced the AMD Duron processor and competes against Intel's Celeron D processor.

AMD coined the name from the Latin semper, which means "always, everyday", to denote that the Sempron was the right processor for everyday computing [1].

Contents

[edit] History and features

The first Sempron CPUs were based on the Athlon XP architecture using the Thoroughbred/Thorton core. These models were equipped with the Socket A interface, 256 KiB L2 cache, and 166 MHz Front side bus (FSB 333). Thoroughbred cores natively had 256KiB L2 cache, but Thortons had 512KiB L2 cache, half of which was disabled and could sometimes be reactivated by bridge modification. Later, AMD introduced the Sempron 3000+ CPU, based on the Barton core with 512 KiB L2 cache. From a hardware and user standpoint, the Socket A Sempron CPUs were essentially renamed Athlon XP desktop CPUs. AMD has ceased production of all Socket A Sempron CPUs.

The second generation (Paris/Palermo core) was based on the architecture of the Socket 754 Athlon 64. Some differences from Athlon 64 processors include a reduced cache size (either 128 or 256 KiB L2), and the absence of AMD64 support in earlier models. Apart from these differences, the Socket 754 Sempron CPUs share most features with the more powerful Athlon 64, including an integrated (on-die) memory controller, the HyperTransport bus, and AMD's "NX bit" feature.

In the second half of 2005, AMD added 64-bit support (AMD64) to the Sempron line. Some journalists (but not AMD) often refer to this revision of chips as "Sempron 64" to distinguish it from the previous revision. AMD's intent in releasing 64-bit entry-level processors was to extend the market for 64-bit processors, which at the time of Sempron 64's first release, was a niche market.

In 2006, AMD announced the Socket AM2 line of Sempron processors. These are functionally equivalent to the previous generation, except they have a dual-channel DDR2 SDRAM memory controller which replaces the single-channel DDR SDRAM version. The TDP of the standard version remains at 62 W (watts), while the new "Energy Efficient Small Form Factor" version has a reduced 35 W TDP. The Socket AM2 version also does not require a minimum voltage of 1.1 volts to operate, whereas all socket 754 Semprons with Cool'n'Quiet did. As of 2006, AMD sells both Socket 754 and Socket AM2 Sempron CPUs concurrently.

[edit] Models for Socket A

[edit] Thoroughbred B/Thorton (130 nm)

  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 256 KiB, fullspeed
  • MMX, 3DNow!, SSE
  • Socket A (EV6)
  • Front side bus: 166 MHz (FSB 333)
  • VCore: 1.6 V
  • First release: July 28, 2004
  • Clockrate: 1500 MHz - 2000 MHz (2200+ to 2800+)

[edit] Barton (130 nm)

[edit] Models for Socket 754

[edit] Paris (130 nm SOI)

  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 256 KiB, fullspeed
  • MMX, 3DNow!, SSE, SSE2
  • Enhanced Virus Protection (NX bit)
  • Integrated 72-bit(Single channel, ECC capable) DDR memory controller
  • Socket 754, 800 MHz HyperTransport
  • VCore: 1.4 V
  • First release: July 28, 2004
  • Clockrate: 1800 MHz (3100+)
  • Stepping: CG (Part No.: *AX)

[edit] Palermo (90 nm SOI)

  • Early models (stepping D0) are downlabeled "Oakville" mobile Athlon64
  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 128/256 KiB, fullspeed
  • MMX, 3DNow!, SSE, SSE2
  • SSE3 support on E3 and E6 steppings
  • AMD64 on E6 stepping
  • Cool'n'Quiet (Sempron 3000+ and higher)
  • Enhanced Virus Protection (NX bit)
  • Integrated 72-bit(Single channel, ECC capable) DDR memory controller
  • Socket 754, 800 MHz HyperTransport
  • VCore: 1.4 V
  • First release: February 2005
  • Clockrate: 1400 - 2000 MHz
    • 128 KiB L2-Cache (Sempron 2600+, 3000+, 3300+)
    • 256 KiB L2-Cache (Sempron 2500+, 2800+, 3100+, 3400+)
  • Steppings: D0 (Part No.: *BA), E3 (Part No.: *BO), E6 (Part No.: *BX)

[edit] Models for Socket 939

[edit] Palermo (90 nm SOI)

  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 128/256 KiB, fullspeed
  • MMX, 3DNow!, SSE, SSE2, SSE3, AMD64 (E6 Steppings Only), Cool'n'Quiet, NX bit
  • Integrated 144-bit(Dual channel, ECC capable) DDR memory controller
  • Socket 939, 800 MHz HyperTransport
  • VCore: 1.35/1.4 V
  • First release: October 2005
  • Clockrate: 1800 - 2000 MHz
    • 128 KiB L2-Cache (Sempron 3000+, 3400+)
    • 256 KiB L2-Cache (Sempron 3200+, 3500+)
  • Steppings: E3 (Part No.: *BP), E6 (Part No.: *BW)

[edit] Models for Socket AM2

[edit] Manila (90 nm SOI)

  • L1-Cache: 64 + 64 KiB (Data + Instructions)
  • L2-Cache: 128/256 KiB, fullspeed
  • MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
  • Integrated 128-bit(Dual channel) DDR2 memory controller
  • Socket AM2, 800 MHz HyperTransport
  • VCore: 1.25/1.35/1.40 V (1.20/1.25 V for Energy Efficient SFF version)
  • First release: May 23, 2006
  • Clockrate: 1600 - 2000 MHz
    • 128 KiB L2-Cache (Sempron 2800+, 3200+, 3500+)
    • 256 KiB L2-Cache (Sempron 3000+, 3400+, 3600+)
  • Stepping: F2 (Part No.: *CN, *CW)

[edit] Socket 754 32-bit Semprons

Max P-State Model Manufacturing Process Part Number(OPN)
1600 MHz 2600+ 0.09 micron SDA2600AIO2BA(some parts are 64-bit)
1600 MHz 2800+ 0.09 micron SDA2800AIO3BA
1800 MHz 3000+ 0.13 micron SDA3000AIP2AX
1800 MHz 3100+ 0.13 micron SDA3100AIP3AX
1800 MHz 3100+ 0.09 micron SDA3100AIO3BA
2000 MHz 3300+ 0.09 micron SDA3300AIO2BA

[edit] Semprons without Cool'n'Quiet

AMD has released some Sempron processors without Cool'n'Quiet support. The following table describes those processors lacking Cool'n'Quiet.

Max P-State Min P-State Model Operating Mode Package-Socket Manufacturing Process Part Number(OPN)
1400 MHz N/A 2500+ 32/64 Socket 754 0.09 micron SDA2500AIO3BX
1600 MHz N/A 2600+ 32 or 32/64 Socket 754 0.09 micron SDA2600AIO2BA
1600 MHz N/A 2600+ 32/64 Socket 754 0.09 micron SDA2600AIO2BX
1600 MHz N/A 2800+ 32 Socket 754 0.09 micron SDA2800AIO3BA
1600 MHz N/A 2800+ 32/64 Socket 754 0.09 micron SDA2800AIO3BX
1600 MHz N/A 2800+ 32/64 Socket AM2 0.09 micron SDA2800IAA2CN
1600 MHz N/A 3000+ 32/64 Socket AM2 0.09 micron SDA3000IAA3CN
1600 MHz N/A 3000+ 32/64 Socket AM2 0.09 micron SDD3000IAA3CN

[edit] Future plans

Current event marker This article contains information about a scheduled or expected future product.
It may contain preliminary or speculative information, and may not reflect the final version of the product.

As AMD lowers the price of its entry-level Athlon 64 processors to compete with Intel's entry-level Core 2 processors, the long-term future of the Sempron as an entry-level processor is unclear. In Q2 2007, the Sempron will migrate to the 65nm SOI process, under the code name "Sparta". These new Semprons will have the same 35 W TDP of the current "Energy Efficient SFF" Semprons. They will remain single-core. [2]

In Q4 2007, Sempron-branded implementations of the Stars microarchitecture are expected to become available, based on the Rana core. These are expected to be dual-core processors without L3 cache. Initial clock rates will be between 2.1 GHz and 2.3 GHz. The Rana Semprons will feature HyperTransport 3.0 support and will be packaged for the Socket AM2+ form factor, although they are expected to function in Socket AM2 motherboards, albeit without support for HyperTransport 3.0 enhancements.[3]

[edit] References

[edit] See also

[edit] External links


Static Wikipedia 2008 (no images)

aa - ab - af - ak - als - am - an - ang - ar - arc - as - ast - av - ay - az - ba - bar - bat_smg - bcl - be - be_x_old - bg - bh - bi - bm - bn - bo - bpy - br - bs - bug - bxr - ca - cbk_zam - cdo - ce - ceb - ch - cho - chr - chy - co - cr - crh - cs - csb - cu - cv - cy - da - de - diq - dsb - dv - dz - ee - el - eml - en - eo - es - et - eu - ext - fa - ff - fi - fiu_vro - fj - fo - fr - frp - fur - fy - ga - gan - gd - gl - glk - gn - got - gu - gv - ha - hak - haw - he - hi - hif - ho - hr - hsb - ht - hu - hy - hz - ia - id - ie - ig - ii - ik - ilo - io - is - it - iu - ja - jbo - jv - ka - kaa - kab - kg - ki - kj - kk - kl - km - kn - ko - kr - ks - ksh - ku - kv - kw - ky - la - lad - lb - lbe - lg - li - lij - lmo - ln - lo - lt - lv - map_bms - mdf - mg - mh - mi - mk - ml - mn - mo - mr - mt - mus - my - myv - mzn - na - nah - nap - nds - nds_nl - ne - new - ng - nl - nn - no - nov - nrm - nv - ny - oc - om - or - os - pa - pag - pam - pap - pdc - pi - pih - pl - pms - ps - pt - qu - quality - rm - rmy - rn - ro - roa_rup - roa_tara - ru - rw - sa - sah - sc - scn - sco - sd - se - sg - sh - si - simple - sk - sl - sm - sn - so - sr - srn - ss - st - stq - su - sv - sw - szl - ta - te - tet - tg - th - ti - tk - tl - tlh - tn - to - tpi - tr - ts - tt - tum - tw - ty - udm - ug - uk - ur - uz - ve - vec - vi - vls - vo - wa - war - wo - wuu - xal - xh - yi - yo - za - zea - zh - zh_classical - zh_min_nan - zh_yue - zu -

Static Wikipedia 2007 (no images)

aa - ab - af - ak - als - am - an - ang - ar - arc - as - ast - av - ay - az - ba - bar - bat_smg - bcl - be - be_x_old - bg - bh - bi - bm - bn - bo - bpy - br - bs - bug - bxr - ca - cbk_zam - cdo - ce - ceb - ch - cho - chr - chy - co - cr - crh - cs - csb - cu - cv - cy - da - de - diq - dsb - dv - dz - ee - el - eml - en - eo - es - et - eu - ext - fa - ff - fi - fiu_vro - fj - fo - fr - frp - fur - fy - ga - gan - gd - gl - glk - gn - got - gu - gv - ha - hak - haw - he - hi - hif - ho - hr - hsb - ht - hu - hy - hz - ia - id - ie - ig - ii - ik - ilo - io - is - it - iu - ja - jbo - jv - ka - kaa - kab - kg - ki - kj - kk - kl - km - kn - ko - kr - ks - ksh - ku - kv - kw - ky - la - lad - lb - lbe - lg - li - lij - lmo - ln - lo - lt - lv - map_bms - mdf - mg - mh - mi - mk - ml - mn - mo - mr - mt - mus - my - myv - mzn - na - nah - nap - nds - nds_nl - ne - new - ng - nl - nn - no - nov - nrm - nv - ny - oc - om - or - os - pa - pag - pam - pap - pdc - pi - pih - pl - pms - ps - pt - qu - quality - rm - rmy - rn - ro - roa_rup - roa_tara - ru - rw - sa - sah - sc - scn - sco - sd - se - sg - sh - si - simple - sk - sl - sm - sn - so - sr - srn - ss - st - stq - su - sv - sw - szl - ta - te - tet - tg - th - ti - tk - tl - tlh - tn - to - tpi - tr - ts - tt - tum - tw - ty - udm - ug - uk - ur - uz - ve - vec - vi - vls - vo - wa - war - wo - wuu - xal - xh - yi - yo - za - zea - zh - zh_classical - zh_min_nan - zh_yue - zu -

Static Wikipedia 2006 (no images)

aa - ab - af - ak - als - am - an - ang - ar - arc - as - ast - av - ay - az - ba - bar - bat_smg - bcl - be - be_x_old - bg - bh - bi - bm - bn - bo - bpy - br - bs - bug - bxr - ca - cbk_zam - cdo - ce - ceb - ch - cho - chr - chy - co - cr - crh - cs - csb - cu - cv - cy - da - de - diq - dsb - dv - dz - ee - el - eml - eo - es - et - eu - ext - fa - ff - fi - fiu_vro - fj - fo - fr - frp - fur - fy - ga - gan - gd - gl - glk - gn - got - gu - gv - ha - hak - haw - he - hi - hif - ho - hr - hsb - ht - hu - hy - hz - ia - id - ie - ig - ii - ik - ilo - io - is - it - iu - ja - jbo - jv - ka - kaa - kab - kg - ki - kj - kk - kl - km - kn - ko - kr - ks - ksh - ku - kv - kw - ky - la - lad - lb - lbe - lg - li - lij - lmo - ln - lo - lt - lv - map_bms - mdf - mg - mh - mi - mk - ml - mn - mo - mr - mt - mus - my - myv - mzn - na - nah - nap - nds - nds_nl - ne - new - ng - nl - nn - no - nov - nrm - nv - ny - oc - om - or - os - pa - pag - pam - pap - pdc - pi - pih - pl - pms - ps - pt - qu - quality - rm - rmy - rn - ro - roa_rup - roa_tara - ru - rw - sa - sah - sc - scn - sco - sd - se - sg - sh - si - simple - sk - sl - sm - sn - so - sr - srn - ss - st - stq - su - sv - sw - szl - ta - te - tet - tg - th - ti - tk - tl - tlh - tn - to - tpi - tr - ts - tt - tum - tw - ty - udm - ug - uk - ur - uz - ve - vec - vi - vls - vo - wa - war - wo - wuu - xal - xh - yi - yo - za - zea - zh - zh_classical - zh_min_nan - zh_yue - zu