Turion 64 X2

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Turion 64 X2 is AMD's 64-bit dual-core mobile CPU, intended to compete with Intel's Core and Core 2 CPUs. The Turion 64 X2s were launched May 17, 2006, after several delays. These processors use Socket S1, and feature DDR2 memory. They also include AMD Virtualization Technology and more power-saving features.

AMD Turion 64 X2 first appeared on IBM's 90 nm Silicon on insulator (SOI) process ("Taylor"), but will migrate to 65 nm ("Tyler"), likely with Silicon-Germanium (SiGe) stressed process^{[citation needed]} which was recently achieved through the combined effort of IBM and AMD, with 40% improvement over comparable 65 nm processes^{[citation needed]}.

Contents 1 Future roadmap 2 Cores 2.1 Taylor & Trinidad (90 nm SOI) 2.2 Tyler (65 nm SOI) 3 See also 4 References 5 External links

[edit] Future roadmap

In the first half of 2007, Hawk^[1] will update the current Turion 64 X2, adding support for DDR2-800 . This move will set it up directly against the a new Intel Santa Rosa platform for the Core 2 Duo "Merom" which also supports DDR2-800. Simultaneously, AMD will unveil a refresh of its Kite platform^[2] which brings Wireless Draft-N support, HDMI, hybrid hard drives and dynamic graphics switching to its recommendations. The feature to look out for will be dynamic graphics switching which will seamlessly switch between discrete graphics to maximize performance or low-power integrated graphics to extend battery life.

Griffin^[3] is a future Turion 64 processor featuring Hypertransport 3.0, a new low-power core featuring split-power planes and DDR2-800 support^[4].

[edit] Cores

[edit] Taylor & Trinidad (90 nm SOI)

• Dual AMD64 core
• L1 cache: 64 + 64 KiB (data + instructions) per core
• L2 cache: 256 KiB (Taylor) or 512 KiB (Trinidad) per core, fullspeed
• Memory controller: dual channel DDR2-667 MHz X2 (using full-duplex hypertransport bus renders CPU-RAM bandwidth of 10.7 Gbytes/s --> twice the speed of Intel's Core 2 Duo Merom which is only capable of 5.3 Gbytes/s with its 667MHz FSB Half-Duplex Memory controller)[1]
• MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX bit, AMD-V
• Socket S1, HyperTransport (800 MHz, HT800 ==> 1600 MT/s ==> 10.7GBytes/s CPU-RAM + 6.4 GBytes/s CPU-I/O transfer rate)[2]
• Power consumption (TDP): 31, 33, 35 Watt max
• First release: May 17, 2006
• Clock rate: 1600, 1800, 2000 MHz
  • 31W TDP:
    • TL-50: 1600 MHz (256 KiB L2-Cache per core)
    • TL-52: 1600 MHz (512 KiB L2-Cache per core)
  • 33W TDP:
    • TL-56: 1800 MHz (512 KiB L2-Cache per core)
  • 35W TDP:
    • TL-60: 2000 MHz (512 KiB L2-Cache per core)

[edit] Tyler (65 nm SOI)

• Dual AMD64 core
• L1 cache: 64 + 64 KiB (data + instructions) per core
• L2 cache: 512 KiB per core, fullspeed
• Memory controller: dual channel DDR2-800 MHz (rendering 12.8 GBytes/s full-duplex CPU/RAM bandwidth)
• 100 MHz granularity (Dynamic P-state Transitions)
• MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, PowerNow!, NX Bit, AMD-V
• Socket S1, HyperTransport
• Power consumption (TDP): 35 Watt max
• First release: 2007

[edit] See also

• AMD Turion
• Turion 64
• List of AMD Turion microprocessors
• List of AMD Athlon 64 microprocessors
• List of AMD Sempron microprocessors

[edit] References

1. ^ "AMD Processor Roadmaps for 2007", Tracking AMD, 31 Dec 2006.
2. ^ "AMD Processor Roadmaps for 2007", Tracking AMD, 31 Dec 2006.
3. ^ "AMD Processor Roadmaps for 2007", Tracking AMD, 31 Dec 2006.
4. ^ "AMD Processor Roadmaps for 2007", Tracking AMD, 31 Dec 2006.

[edit] External links

• AMD Turion 64 X2 Mobile Technology Product Page
• AMD Processor Roadmaps for 2007
• Review article with comparison to Turion 64 and Intel Core Duo on hardwarezone.com
• Turion 64 X2 Press release
• AMD Turion 64 X2 technical specifications

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